IPR-NIOS Altera, IPR-NIOS Datasheet - Page 234
IPR-NIOS
Manufacturer Part Number
IPR-NIOS
Description
IP NIOS II MEGACORE RENEW
Manufacturer
Altera
Type
MegaCorer
Datasheet
1.IP-NIOS.pdf
(294 pages)
Specifications of IPR-NIOS
License
Renewal License
Lead Free Status / RoHS Status
Not applicable / Not applicable
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8–48
div
Nios II Processor Reference Handbook
Operation:
Assembler Syntax:
Example:
Description:
Usage:
Exceptions:
Instruction Type:
Instruction Fields:
31
30
29
A
28
27
26
25
24
B
rC ← rA ÷ rB
div rC, rA, rB
div r6, r7, r8
Treating rA and rB as signed integers, this instruction divides rA by rB and then stores the
integer portion of the resulting quotient to rC. After attempted division by zero, the value of rC
is undefined. There is no divide-by-zero exception. After dividing –2147483648 by –1, the
value of rC is undefined (the number +2147483648 is not representable in 32 bits). There is
no overflow exception.
Nios II processors that do not implement the div instruction cause an unimplemented
instruction exception.
Remainder of Division:
If the result of the division is defined, then the remainder can be computed in rD using the
following instruction sequence:
div rC, rA, rB
mul rD, rC, rB
sub rD, rA, rD
Division error
Unimplemented instruction
R
A = Register index of operand rA
B = Register index of operand rB
C = Register index of operand rC
23
22
21
20
19
C
18
17
# The original div operation
# rD = remainder
16
15
14
0x25
13
12
11
10
9
0
8
Chapter 8: Instruction Set Reference
December 2010 Altera Corporation
7
6
5
Instruction Set Reference
4
0x3a
3
2
divide
1
0
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