IPR-NIOS Altera, IPR-NIOS Datasheet - Page 239
IPR-NIOS
Manufacturer Part Number
IPR-NIOS
Description
IP NIOS II MEGACORE RENEW
Manufacturer
Altera
Type
MegaCorer
Datasheet
1.IP-NIOS.pdf
(294 pages)
Specifications of IPR-NIOS
License
Renewal License
Lead Free Status / RoHS Status
Not applicable / Not applicable
- Current page: 239 of 294
- Download datasheet (3Mb)
Chapter 8: Instruction Set Reference
Instruction Set Reference
flushi
December 2010 Altera Corporation
Operation:
Assembler Syntax:
Example:
Description:
Exceptions:
Instruction Type:
Instruction Fields:
31
30
29
A
28
27
26
25
24
0
Flushes the instruction cache line associated with address rA.
flushi rA
flushi r6
Ignoring the tag, flushi identifies the instruction cache line associated with the byte address
in rA, and invalidates that line.
If the Nios II processor core does not have an instruction cache, the flushi instruction
performs no operation.
For more information about the data cache, refer to the
chapter of the Nios II Software Developer’s Handbook.
None
R
A = Register index of operand rA
23
22
21
20
19
0
18
17
16
15
14
0x0c
13
12
11
10
Cache and Tightly Coupled Memory
flush instruction cache line
9
0
8
Nios II Processor Reference Handbook
7
6
5
4
0x3a
3
2
1
8–53
0
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