DS-FND-BSX-PC Xilinx Inc, DS-FND-BSX-PC Datasheet - Page 105

• Manufacturer Part Number: DS-FND-BSX-PC
• Description: FOUNDATION BASE SYS W/SYN EXPRES
• Manufacturer: Xilinx Inc
• Type: Foundation Systemr

Specifications of DS-FND-BSX-PC

• For Use With/related Products: Xilinx Programmable Logic Devices
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 122-1185

Foundation Series 2.1i User Guide
Top-level Designs
All-HDL Designs
Creating the Design
HDL Flow projects do not require the designation of a top-level
design until synthesis. VHDL, Verilog, and schematic files can be
added to an HDL Flow project. VHDL and Verilog source files can be
created by the HDL Editor, Finite State Machine Editor, or other text
editors. When you initiate the synthesis phase, you designate one of
the project’s entities (VHDL), modules (Verilog), or schematics as the
top-level of the design. The list of entities, modules, and schematics is
automatically extracted from all the source files added to the project.
Synthesis processing starts at the designated top-level file. All
modules below the top-level file are elaborated and optimized.
HDL designs can contain underlying LogiBLOXs, CORE Generator
modules, and XNF/EDIF files that are instantiated in the VHDL and
Verilog code as “black boxes.” Black box modules are not elaborated
and optimized during synthesis. (Refer to the “HDL Designs with
Black Box Instantiation” section for more information on Black
Boxes.)
The following procedure describes the HDL flow for designs that are
HDL only, that is, there are no schematics or instantiated LogiBLOX,
netlist, or state machine macros.
1.
2.
3.
4.
Open the HDL Editor by clicking the HDL Editor icon in the
Design Entry box on the Project Manager’s Flow tab.
When the HDL Editor window appears, you may select an
existing HDL file or create a new one. The following steps
describe creating a new HDL file with the Design Wizard.
When the HDL Editor dialog box displays, select Use HDL
Design Wizard. Click OK.
Click Next in the Design Wizard window.
Design Methodologies - HDL Flow
5-3