DS-FND-BSX-PC Xilinx Inc, DS-FND-BSX-PC Datasheet - Page 235

• Manufacturer Part Number: DS-FND-BSX-PC
• Description: FOUNDATION BASE SYS W/SYN EXPRES
• Manufacturer: Xilinx Inc
• Type: Foundation Systemr

Specifications of DS-FND-BSX-PC

• For Use With/related Products: Xilinx Programmable Logic Devices
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 122-1185

Foundation Series 2.1i User Guide
Additional Implementation Tools
Pad Report (FPGAs)
Fitting Report (CPLDs)
Post Layout Timing Report
Constraints Editor
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The Pad Report lists the design’s pinout in three ways.
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The Fitting Report (design_name.rpt) lists summary and detailed
information about the logic and I/O pin resources used by the
design, including the pinout, error and warning messages, and
Boolean equations representing the implemented logic.
A timing summary report shows the calculated worst-case timing for
the logic paths in your design.
From the Project Manager’s Tools menu, you can select Tools
Implementation to access the additional implementation tools
described below.
You can invoke the Xilinx implementation Constraints Editor by
selecting Tools
The Number of Signals Not Completely Routed should be zero
for a completely implemented design. If non-zero, you may be
able to improve results by using re-entrant routing or the multi-
pass place and route flow.
The timing summary at the end of the report details the design’s
asynchronous delays.
Signals are referenced according to pad numbers.
Pad numbers are referenced according to signal names.
PCF file constraints are listed. This section of the Pad Report can
be cut and pasted into the .pcf file after the SCHEMATIC END;
statement to preserve the pinout for future design iterations.
Implementation
Constraints Editor.
Design Implementation
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