DS-FND-BSX-PC Xilinx Inc, DS-FND-BSX-PC Datasheet - Page 260

• Manufacturer Part Number: DS-FND-BSX-PC
• Description: FOUNDATION BASE SYS W/SYN EXPRES
• Manufacturer: Xilinx Inc
• Type: Foundation Systemr

Specifications of DS-FND-BSX-PC

• For Use With/related Products: Xilinx Programmable Logic Devices
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 122-1185

Foundation Series 2.1i User Guide
functional simulation
guided design
guided mapping
HDL
HDL Editor
HDL Flow
A-8
A process to test the logic in a design before implementation to deter-
mine if it works properly. Uses unit delays because timing informa-
tion is not available before implementation.
Guided design is the use of a previously implemented version of a
file for design mapping, placement, and routing. Guided design
allows logic to be modified or added to a design while preserving the
layout and performance that have been previously achieved.
An existing NCD file is used to “guide” the current MAP run. The
guide file may be used at any stage of implementation: unplaced or
placed, unrouted or routed. In 2.1i, guided mapping is supported
through the Project Manager.
Hardware Description Language. A language that describes circuits
in textual code. The two most widely accepted HDLs are VHDL and
Verilog.
Design entry tool to produce/edit HDL files. The HDL Editor also
provides a syntax checker, language templates, and access to the
synthesis tools.
An HDL Flow project can contain VHDL, Verilog, or schematic top-
level designs. It can contain underlying schematic, HDL (VHDL or
Verilog), or State Machine designs. The entire design is always
exported in HDL terms and synthesized. Top level schematic designs
in an HDL Flow are exported as schematic netlists, optimized by the
synthesis tool, and then exported for Implementation. On the Project
Manager Flow tab, a Synthesis button is included between the Design
Entry and Implementation buttons for this project type.
Xilinx Development System