DS-FND-BSX-PC Xilinx Inc, DS-FND-BSX-PC Datasheet - Page 266

• Manufacturer Part Number: DS-FND-BSX-PC
• Description: FOUNDATION BASE SYS W/SYN EXPRES
• Manufacturer: Xilinx Inc
• Type: Foundation Systemr

Specifications of DS-FND-BSX-PC

• For Use With/related Products: Xilinx Programmable Logic Devices
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 122-1185

Foundation Series 2.1i User Guide
PDF file
physical Design Rule Check (DRC)
physical macro
pin
pinwires
project
A-14
Project Description File. The PDF file contains library and other
project-specific information. Not to be confused with an Adobe
Acrobat document with the same extension.
Physical Design Rule Check (DRC) is a series of tests to discover
logical and physical errors in the design. Physical DRC is applied
from the FPGA Editor, BitGen program, PAR program, and Hard-
ware Debugger. By default, results of the DRC are written into the
current working directory.
A physical macro is a logical function that has been created from
components of a specific device family. Physical macros are stored in
files with the extension .nmc. A physical macro is created when the
FPGA Editor is in macro mode. See also “macro.”
A pin can be a symbol pin or a package pin. A package pin is a
physical connector on an integrated circuit package that carries
signals into and out of an integrated circuit. A symbol pin, also
referred to as an instance pin, is the connection point of an instance to
a net.
Pinwires are wires which are directly tied to the pin of a site (CLB,
IOB, etc.)
Foundation organizes related files into a distinct logical unit called a
project, which contains a variety of file types. A project is created as
either a Schematic Flow or an HDL Flow project.
Xilinx Development System