DS-FND-BSX-PC Xilinx Inc, DS-FND-BSX-PC Datasheet - Page 174
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DS-FND-BSX-PC
Manufacturer Part Number
DS-FND-BSX-PC
Description
FOUNDATION BASE SYS W/SYN EXPRES
Manufacturer
Xilinx Inc
Type
Foundation Systemr
Datasheet
1.DS-FND-BSX-PC.pdf
(330 pages)
Specifications of DS-FND-BSX-PC
For Use With/related Products
Xilinx Programmable Logic Devices
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
122-1185
- Current page: 174 of 330
- Download datasheet (3Mb)
Foundation Series 2.1i User Guide
6-18
LogiBLOX RAM/ROM module. Consider the RAM32X2S example.
Suppose that each of the RAM primitives needs to be constrained to a
particular CLB location.
Based on the rules for determining the MEMx_y instance names,
using the example from above, each of the RAM primitives can be
referenced by concatenating the full-hierarchical name to each of the
MEMx_y names. The RAM32x2S created by LogiBLOX will have
primitives named MEM0_0 and MEM1_0. So, CLB constraints in a
.ucf file for each of these two items would be:
In the following figure, the LogiBLOX module is contained in the
“inside UO” component.
Figure 6-7 Top-level Verilog File
The following figure illustrates the instantiated LogiBLOX module,
“memory U1”.
INST “U0_U1/MEM0_0” LOC=CLB_R10C10;
INST “U0_U1/MEM0_1” LOC=CLB_R11C11;
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