DS-FND-BSX-PC Xilinx Inc, DS-FND-BSX-PC Datasheet - Page 237

• Manufacturer Part Number: DS-FND-BSX-PC
• Description: FOUNDATION BASE SYS W/SYN EXPRES
• Manufacturer: Xilinx Inc
• Type: Foundation Systemr

Specifications of DS-FND-BSX-PC

• For Use With/related Products: Xilinx Programmable Logic Devices
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 122-1185

Foundation Series 2.1i User Guide
Running Re-Entrant Routing on FPGAs
You can use re-entrant routing to further route an already routed
design. The design maintains its current routing and additional
routing is added. You can reroute connections by running cost-based
cleanup, delay-based cleanup, and additional re-entrant route passes.
Cleanup passes attempt to minimize the delays on all nets and
decrease the number of routing resources used. Cost-based cleanup
routing is faster while delay-based cleanup is more intensive.
Re-entrant routing offers the following advantages.
•
•
•
Note: Re-entrant Routing is supported for the FPGA device families
only.
Use the following procedure to perform Re-Entrant Routing.
1.
2.
3.
•
Optionally, you can select Setup
where to stop processing.
Cleanup passes significantly reduce delays, especially on non-
timing driven runs.
For timing-driven runs, cleanup passes can improve timing on
elements not covered by timing constraints.
For designs which do not meet timing goals by a narrow margin,
delay-based cleanup passes can reorganize routing so that addi-
tional re-entrant route passes enable the design to meet timing
goals.
In the Project Manager Versions tab, select an implemented revi-
sion.
Select Tools
Project Manager’s menu bar.
Select Setup
to access the FPGA Re-entrant Route dialog box.
Select Flow
tion process.
FPGA Re-entrant Route from the Flow Engine
Implementation
Step to single step through the implementa-
Stop After and select
Flow Engine from the
Design Implementation
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