DS-FND-BSX-PC Xilinx Inc, DS-FND-BSX-PC Datasheet - Page 166
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DS-FND-BSX-PC
Manufacturer Part Number
DS-FND-BSX-PC
Description
FOUNDATION BASE SYS W/SYN EXPRES
Manufacturer
Xilinx Inc
Type
Foundation Systemr
Datasheet
1.DS-FND-BSX-PC.pdf
(330 pages)
Specifications of DS-FND-BSX-PC
For Use With/related Products
Xilinx Programmable Logic Devices
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
122-1185
- Current page: 166 of 330
- Download datasheet (3Mb)
Foundation Series 2.1i User Guide
Design Partitioning Guidelines
6-10
Setting Constraints Prior to Synthesis
With the Foundation Express product you can set performance
constraints and attributes to guide the optimization process on a
module-by-module basis. Select Edit Synthesis/Implementa-
tion Constraints in the Synthesis/Implementation settings
dialog box to access the Express Constraints Editor window. This
window contains tabs with spreadsheets and dialog boxes specific to
the target architecture. You need to select View Estimated
Performance after Optimization in the Synthesis/Implemen-
tation settings dialog box to view spreadsheets containing the results
obtained as a result of setting the constraints. Refer to the“Using
Constraints in an HDL Design” section for more information on
constraints in HDL designs.
The way in which a design is partitioned can affect how well the
optimizer can optimize the combinatorial logic. If a design is poorly
partitioned in the entry phase, logic optimization can suffer. Here are
some HDL coding and partitioning guidelines that will help improve
logic optimization.
•
Avoid imposing boundaries on combinatorial paths.
If parts of a combinatorial logic path are compiled in separate
modules, no logic optimization can be performed across the
block boundaries.
Xilinx Development System
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