DS-FND-BSX-PC Xilinx Inc, DS-FND-BSX-PC Datasheet - Page 136
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DS-FND-BSX-PC
Manufacturer Part Number
DS-FND-BSX-PC
Description
FOUNDATION BASE SYS W/SYN EXPRES
Manufacturer
Xilinx Inc
Type
Foundation Systemr
Datasheet
1.DS-FND-BSX-PC.pdf
(330 pages)
Specifications of DS-FND-BSX-PC
For Use With/related Products
Xilinx Programmable Logic Devices
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
122-1185
- Current page: 136 of 330
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Foundation Series 2.1i User Guide
5-34
6.
7.
Note: Instead of opening a second sesssion, you could use Edit
Insert File from the HDL Editor tool bar to insert the file into the
current HDL Editor session.
In the HDL Editor, open the LogiBLOX- created .vei file
(memory.vei) located under the current project. The .vei file for
the memory component created in the previous steps is shown
below.
//---------------------------------------------------
// LogiBLOX SYNC_RAM Module "memory"
// Created by LogiBLOX version C.16
//
// Attributes
//
//
//
//
//
//---------------------------------------------------
memory instance_name
( .A(),
module memory(A, DO, DI, WR_EN, WR_CLK);
input [5:0] A;
output [3:0] DO;
input [3:0] DI;
input WR_EN;
input WR_CLK;
endmodule
Open a second session of the HDL Editor. In the second HDL
Editor window, open the Verilog design file in which the Logi-
BLOX component is to be instantiated.
Cut and paste the module declaration from the LogiBLOX
component’s .vei file into the Verilog design code, placing it after
the “endmodule” line within the architecture section or the
Verilog design code.
.DO(),
.DI(),
.WR_EN(),
.WR_CLK());
on Wed Jun 01 10:40:25 1999
MODTYPE = SYNC_RAM
BUS_WIDTH = 4
DEPTH = 48
STYLE = MAX_SPEED
USE_RPM = FALSE
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