DS-FND-BSX-PC Xilinx Inc, DS-FND-BSX-PC Datasheet - Page 106

• Manufacturer Part Number: DS-FND-BSX-PC
• Description: FOUNDATION BASE SYS W/SYN EXPRES
• Manufacturer: Xilinx Inc
• Type: Foundation Systemr

Specifications of DS-FND-BSX-PC

• For Use With/related Products: Xilinx Programmable Logic Devices
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 122-1185

Foundation Series 2.1i User Guide
5-4
Analyzing Design File Syntax
5.
Note: For top-level ABEL designs, you must use the Schematic Flow.
6.
7.
8.
9.
10. Exit the HDL Editor.
For more information about HDL designs, see the“HDL Design Entry
and Synthesis” chapter or, in the HDL Editor window, select Help
Help Topics.
Syntax is checked automatically when the design is added to the
project. You can initiate a syntax check in the HDL Editor by selecting
Synthesis
selecting Project
Manager.
Use the HDL Error and HDL Warnings tabs in the messages area at
the bottom of the Project Manager to view any syntax errors or
messages output during analysis.
From the Design Wizard - Language window, select VHDL or
Verilog. Click Next.
In the Design Wizard - Name window, enter the name of your
design file. Click Next.
Define your ports in the Design Wizard-Ports window by
clicking NEW, entering the port name, and selecting its direction.
Click Finish. The Wizard creates the ports and gives you a
template (in VHDL or Verilog) in which you can enter your
design.
Create the design in the HDL Editor. The Language Assistant is
available to help with this step. It provides a number of language
templates for basic language constructs and synthesis templates
for synthesis-oriented implementation of basic functional blocks,
such as multiplexers, counters, flip-flops, etc. Access the
Language Assistant by selecting Tools
tant.
Add the design to the project by selecting Project
Project.
Check Syntax. You can also analyze syntax by
Analyze All Sources from the Project
Xilinx Development System
Language Assis-
Add to