DS-FND-BSX-PC Xilinx Inc, DS-FND-BSX-PC Datasheet - Page 6

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DS-FND-BSX-PC

Manufacturer Part Number
DS-FND-BSX-PC
Description
FOUNDATION BASE SYS W/SYN EXPRES
Manufacturer
Xilinx Inc
Type
Foundation Systemr
Datasheet

Specifications of DS-FND-BSX-PC

For Use With/related Products
Xilinx Programmable Logic Devices
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
122-1185
Foundation Series 2.1i User Guide
Manual Contents
ii
Application
Notes
Data Book
Xcell Journals
Tech Tips
Resource
Descriptions of device-specific design techniques and approaches
http://support.xilinx.com/apps/appsweb.htm
Pages from The Programmable Logic Data Book, which describe device-
specific information on Xilinx device characteristics, including read-
back, boundary scan, configuration, length count, and debugging
http://support.xilinx.com/partinfo/databook.htm
Quarterly journals for Xilinx programmable logic users
http://support.xilinx.com/xcell/xcell.htm
Latest news, design tips, and patch information on the Xilinx design
environment
http://support.xilinx.com/support/techsup/journals/index.htm
This guide covers the following topics:
Chapter 1, “Introduction,” lists supported architectures,
platforms, and features. It also lists the available documentation
and tutorials to help you get started with Foundation.
Chapter 2, “Project Toolset,” explains the two Foundation project
types—Schematic Flow projects and HDL Flow projects—and
how to access the various Foundation design tools from the
Project Manager. It briefly describes each tool and its function.
Chapter 3, “Design Methodologies - Schematic Flow,” describes
various design methodologies for top-level schematic designs
and state machine designs in Schematic Flow projects.
Chapter 4, “Schematic Design Entry,” explains how to manage
your schematic designs and how to create hierarchical schematic
designs.
Chapter 5, “Design Methodologies - HDL Flow,” describes
various design methodologies for HDL, schematic, and state
machine designs in HDL Flow projects.
Chapter 6, “HDL Design Entry and Synthesis,” describes how to
create top-level HDL designs, explains how to manage large
designs, and discusses advanced design techniques.
Description/URL
Xilinx Development System

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