DS-FND-BSX-PC Xilinx Inc, DS-FND-BSX-PC Datasheet - Page 249

• Manufacturer Part Number: DS-FND-BSX-PC
• Description: FOUNDATION BASE SYS W/SYN EXPRES
• Manufacturer: Xilinx Inc
• Type: Foundation Systemr

Specifications of DS-FND-BSX-PC

• For Use With/related Products: Xilinx Programmable Logic Devices
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 122-1185

Foundation Series 2.1i User Guide
In-Circuit Verification
Downloading a Design
As a final test, you can verify how your design performs in the target
application. In-circuit verification tests the circuit under typical oper-
ating conditions. Because you can program your Xilinx devices
repeatedly, you can easily load different iterations of your design into
your device and test it in-circuit.
To verify your FPGA designs in-circuit, download your design
bitstream into a device with the Xilinx XChecker cable.
Refer to the following section for more information on programming
your target device.
To download your design, you must successfully run implementation
to create a configuration bitstream. Xilinx provides the MultiLINX
cable, Parallel Cable III, or the XChecker cable, depending on which
development system you are using, to download the bitstream to a
device.
You can use the XChecker cable or MultiLINX cable to read back and
verify configuration data. Detailed cable connection and daisy-chain
information is provided in the Hardware Debugger Guide.
Note: The Xilinx Parallel Cable III can be used for FPGA and CPLD
design download and readback, but it does not have a design verifi-
cation function.
With the XChecker cable, you can use the Hardware Debugger Pick
function to take snapshots of the circuit at specific clock cycles. You
can obtain these snapshots by performing serial readback of the
nodes during in-circuit operation. With the Hardware Debugger soft-
ware, you can speed up your analysis by limiting the readback
bitstream to only those nodes and clock cycles in which you have
interest.
You can also use the XChecker cable to probe your design after you
download it. Probing internal nodes allows you to pinpoint the loca-
tion of any design problems.
Use the XChecker cable when you do not want to specify additional
IOBs and routing resources on your Xilinx FPGA for probing. This
Verification and Programming
12-7