DS-FND-BSX-PC Xilinx Inc, DS-FND-BSX-PC Datasheet - Page 25

• Manufacturer Part Number: DS-FND-BSX-PC
• Description: FOUNDATION BASE SYS W/SYN EXPRES
• Manufacturer: Xilinx Inc
• Type: Foundation Systemr

Specifications of DS-FND-BSX-PC

• For Use With/related Products: Xilinx Programmable Logic Devices
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 122-1185

Chapter 11 Design Implementation
Foundation Series 2.1i User Guide
Basic Functional Simulation Process ............................................. 10-1
HDL Top-down Methodology ......................................................... 10-5
HDL with Underlying Netlists.......................................................... 10-6
Simulation Script Editor.................................................................. 10-7
Waveform Editing Functions .......................................................... 10-7
Versions and Revisions.................................................................. 11-1
Implementing a Design .................................................................. 11-9
Setting Control Files....................................................................... 11-12
Selecting Options ........................................................................... 11-18
Invoking the Simulator .............................................................. 10-1
Attaching Probes (Schematic Editor Only)................................ 10-2
Adding Signals .......................................................................... 10-2
Creating Buses ......................................................................... 10-3
Applying Stimulus ..................................................................... 10-3
Running Simulation................................................................... 10-4
Schematic Flow Projects........................................................... 11-1
HDL Flow Projects .................................................................... 11-3
Revision Control........................................................................ 11-9
User Constraints File ................................................................ 11-12
Guide Files................................................................................ 11-13
Floorplan Files .......................................................................... 11-16
Place & Route Effort Level........................................................ 11-19
Program Options....................................................................... 11-19
Stimulator Selection Dialog.................................................. 10-3
Waveform Test Vectors ....................................................... 10-4
Script File Macro.................................................................. 10-4
Creating Versions ................................................................ 11-2
Creating Revisions............................................................... 11-2
Creating Versions ................................................................ 11-3
Updating Versions ............................................................... 11-4
Creating Revisions............................................................... 11-4
Creating a new Revision...................................................... 11-7
Creating the First Version and Revision in One Step .......... 11-8
Guiding FPGA Designs........................................................ 11-13
Guiding CPLD Designs........................................................ 11-14
Setting Guide Files .............................................................. 11-14
Implementation Templates .................................................. 11-20
Simulation Templates .......................................................... 11-20
Configuration Templates (FPGAs)....................................... 11-20
Template Manager............................................................... 11-21
Contents
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