DS-FND-BSX-PC Xilinx Inc, DS-FND-BSX-PC Datasheet - Page 316

no-image

DS-FND-BSX-PC

Manufacturer Part Number
DS-FND-BSX-PC
Description
FOUNDATION BASE SYS W/SYN EXPRES
Manufacturer
Xilinx Inc
Type
Foundation Systemr
Datasheet

Specifications of DS-FND-BSX-PC

For Use With/related Products
Xilinx Programmable Logic Devices
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
122-1185
Foundation Series 2.1i User Guide
RAM and ROM
C-6
CAPTURE_
VIRTEX
READBACK
MD0
MD1
MD2
Name
Virtex
XC4000E
XC4000X
XC5200
Spartan
SpartanXL
XC4000E
XC4000X
XC5200
XC4000E
XC4000X
XC5200
XC4000E
XC4000X
XC5200
Library
of the three reserved mode pins, see the Programmable Logic Data Book
and the online Libraries Guide.
Table C-4 Readback Components
Some of the most frequently instantiated library components are the
RAM and ROM primitives. Because most synthesis tools are unable
to infer RAM or ROM components from the source HDL, the
primitives must be used to build up more complex structures. The
following list of RAM and ROM components is a complete list of the
primitives available in the Xilinx library. For more information on the
Controls when to capture register
information for readback.
Accesses the bitstream readback
function. A low-to-high transition
on the TRIG input initiates the
readback process.
Connects to the Mode 0 (M0) input
pin, which is used to determine the
configuration mode.
Connects to the Mode 1 (M1) input
pin, which is used to determine the
configuration mode.
Connects to the Mode 2 (M2) input
pin, which is used to determine the
configuration mode.
Description
Xilinx Development System
DATA, RIP
Outputs
I
I
Inputs
TRIG
CLK,
CAP,
CLK
O

Related parts for DS-FND-BSX-PC