DS-FND-BSX-PC Xilinx Inc, DS-FND-BSX-PC Datasheet - Page 305
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DS-FND-BSX-PC
Manufacturer Part Number
DS-FND-BSX-PC
Description
FOUNDATION BASE SYS W/SYN EXPRES
Manufacturer
Xilinx Inc
Type
Foundation Systemr
Datasheet
1.DS-FND-BSX-PC.pdf
(330 pages)
Specifications of DS-FND-BSX-PC
For Use With/related Products
Xilinx Programmable Logic Devices
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
122-1185
- Current page: 305 of 330
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Foundation Series 2.1i User Guide
Constraining LogiBLOX RAM/ROM with Synopsys
Estimating the Number of Primitives Used
How the RAM Primitives are Named
In the M1 XSI (Xilinx Synopsys Interface) HDL methodology,
whenever large blocks of RAM/ROM are needed, LogiBLOX RAM/
ROM modules are instantiated in the HDL code. With LogiBLOX
RAM/ROM modules instantiated in the HDL code, timing and/or
placement constraints on these RAM/ROM modules, and the RAM/
ROM primitives that comprise these modules, can be specified in a
UCF file. To create timing and/or placement constraints for RAM/
ROM LogiBLOX modules, knowledge of how many primitives will
be used and how the primitives, and/or how the RAM/ROM
LogiBLOX modules are named is needed.
When a RAM/ROM is specified with LogiBLOX, the RAM/ROM
depth and width are specified. If the RAM/ROM depth is divisible
by 32, then 32x1 primitives are used. If the RAM/ROM depth is not
divisible by 32, then 16x1 primitives are used instead. In the case of
dual-port RAMs, 16x1 primitives are always used. Based on whether
32x1 or 16x1 primitives are used, the number of RAM/ROM can be
calculated.
For example, if a RAM48x4 was required for a design, RAM16x1
primitives would be used. Based on the width, there would be four
banks of RAM16x1s. Based on the depth, each bank would have three
RAM16x1s.
Using the example of a RAM48x4, the RAM primitives inside the
LogiBLOX are named as follows.
Each primitive in a LogiBLOX RAM/ROM module has an instance
name of MEMx_y, where y represents the primitive position in the
bank of memory and where x represents the bit position of the RAM/
ROM output.
MEM0_0
MEM0_1
MEM0_2
MEM1_0
MEM1_1
MEM1_2
MEM2_0
MEM2_1
MEM2_2
MEM3_0
MEM3_1
MEM3_2
Foundation Constraints
B-33
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