DS-FND-BSX-PC Xilinx Inc, DS-FND-BSX-PC Datasheet - Page 220

• Manufacturer Part Number: DS-FND-BSX-PC
• Description: FOUNDATION BASE SYS W/SYN EXPRES
• Manufacturer: Xilinx Inc
• Type: Foundation Systemr

Specifications of DS-FND-BSX-PC

• For Use With/related Products: Xilinx Programmable Logic Devices
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 122-1185

Foundation Series 2.1i User Guide
11-14
between place and route iterations. Guiding a design for an FPGA
works as follows.
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After these components and signals are placed and routed, the
remainder of the logic is placed and routed. If you have made only
minor changes to your design and want the remaining logic placed
and routed exactly as in your guide design, select the Match Guide
Design Exactly option. This option locks the placement and routing
of the matching logic so that it cannot change to accommodate addi-
tional logic.
Note: Setting the Match Guide Design Exactly option is not recom-
mended for synthesis based designs.
Guiding CPLD Designs
For CPLDs, each time you implement your design, a guide file is
created (design_name.gyd) which contains your pinout information.
You can reuse this file in subsequent iterations of your design if you
want to keep the same pinouts. If you select a valid implementation
revision or guide file name, the pinouts from that file will be used
when the design is processed.
Note: You can override guide file locations by assigning locations in
your design file or constraints file.
Setting Guide Files
1.
If a component in the new design has the same name as that of
the guide design or file, it is placed as in the guide.
If an unnamed component in the new design is the same type as a
component within the guide, it is placed as in the guide.
If the signals attached to a component in the new design match
the signals attached to the component of the guide, the pins are
swapped to match the guide, where possible.
If the signal names in the input design match the guide, and have
the same sources and loads, the routing information from the
guide design is copied to the new design.
In the Project Manager, select Implementation
File(s) to open the dialog box shown in the following figure.
Xilinx Development System
Set Guide