DS-FND-BSX-PC Xilinx Inc, DS-FND-BSX-PC Datasheet - Page 123

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DS-FND-BSX-PC

Manufacturer Part Number
DS-FND-BSX-PC
Description
FOUNDATION BASE SYS W/SYN EXPRES
Manufacturer
Xilinx Inc
Type
Foundation Systemr
Datasheet

Specifications of DS-FND-BSX-PC

For Use With/related Products
Xilinx Programmable Logic Devices
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
122-1185
Foundation Series 2.1i User Guide
HDL Designs with State Machines
Programming the Device
Creating a State Machine Macro
3.
1.
2.
This section explains how to create a state machine and add it into a
HDL Flow project.
The Files tab in the Hierarchy Browser displays the state machine
name. HDL code is automatically generated from the FSM diagram.
The module (VHDL) or entity (Verilog) name is automatically added
to the top-level selection list.
1.
2.
3.
operation of the simulator is the same for functional and timing
simulation.)
If you have already saved test vectors (for instance, in the
functional simulation), you may load these vectors into the
timing simulator by selecting File
Click the Device Programming icon in the Programming box on
the Project Manager’s Flow tab.
From the Select Program box, choose the Hardware Debugger,
the PROM File Formatter, or the JTAG Programmer. For CPLD
designs, use the JTAG Programmer. For instructions, select Help
Programmer. For FPGA designs, use the JTAG Programmer,
Hardware Debugger, or PROM File Formatter. For instructions,
select Help
Tools and then select the desired tool.
Open the State Editor by clicking the FSM icon in the Design
Entry box on the Project Manager’s Flow tab.
Select Use the HDL Design Wizard. Click OK.
From the Design Wizard window, select Next.
Foundation Help Contents
Foundation Help Contents
Design Methodologies - HDL Flow
Advanced Tools
Load Waveform.
Advanced
JTAG
5-21

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