DS-FND-BSX-PC Xilinx Inc, DS-FND-BSX-PC Datasheet - Page 183

• Manufacturer Part Number: DS-FND-BSX-PC
• Description: FOUNDATION BASE SYS W/SYN EXPRES
• Manufacturer: Xilinx Inc
• Type: Foundation Systemr

Specifications of DS-FND-BSX-PC

• For Use With/related Products: Xilinx Programmable Logic Devices
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 122-1185

Foundation Series 2.1i User Guide
Compromises in State Machine Encoding
Binary Encoding
All that is defined in a symbolic state machine is the relationship
among the states in terms of how input signals affect transitions
between them, the values of the outputs during each state, and in
some cases, the initial state.
An encoded state machine requires the same definition information
as a symbolic machine, but in addition, it requires you to define the
value of the state register for each state.
Symbolic state machines are supported for CPLDs, but they are less
efficient than encoded state machines.
A good state machine design must optimize the amount of
combinatorial logic, the fanin to each register, the number of registers,
and the propagation delay between registers. However, these factors
are interrelated, and compromises between them may be necessary.
For example, to increase speed, levels of logic must be reduced.
However, fewer levels of logic result in wider combinatorial logic,
creating a higher fanin than can be efficiently implemented given the
limited number of fanins imposed by the FPGA architecture.
As another example, you must factor out the logic to decrease the
gate count; that is, you must extract and implement shared terms
using separate logic. Factoring reduces the amount of logic but
increases the levels of logic between registers, which slows down the
circuit. In general, the performance of a highly encoded state machine
implemented in an FPGA device drops as the number of states grows
because of the wider and deeper decoding that is required for each
additional state. CPLDs are less sensitive to this problem because
they allow a higher fanin.
Using the minimum number of registers to encode the machine is
called binary, or maximal, encoding, because the registers are used to
their maximum capacity. Each register represents one bit of a binary
number. The example discussed earlier in this chapter has five states,
which can be represented by three bits in a binary-encoded state
machine.
Although binary encoding keeps the number of registers to a
minimum, it generally increases the amount of combinatorial logic
State Machine Designs
7-5