DS-FND-BSX-PC Xilinx Inc, DS-FND-BSX-PC Datasheet - Page 298

• Manufacturer Part Number: DS-FND-BSX-PC
• Description: FOUNDATION BASE SYS W/SYN EXPRES
• Manufacturer: Xilinx Inc
• Type: Foundation Systemr

Specifications of DS-FND-BSX-PC

• For Use With/related Products: Xilinx Programmable Logic Devices
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 122-1185

Foundation Series 2.1i User Guide
B-26
OFFSET Timespec
Timing Ignore
TIMESPEC TS02 = FROM : PADS : TO : FFS : 36 ;
TIMESPEC TS03 = FROM : FFS : TO : PADS : 36 ns ;
TIMESPEC TS04 = FROM : PADS : TO : PADS : 66 ;
TIMESPEC TS05 = FROM : PADS : TO : RAMS : 36 ;
TIMESPEC TS06 = FROM : RAMS : TO : PADS : 35.5 ;
To automatically include clock buffer/routing delay in your
“PADS:TO: synchronous element or synchronous element :TO:PADS
timing specifications, use OFFSET constraints instead of FROM:TO
constraints.
•
•
If you can ignore timing of paths, use Timing Ignore (TIG).
Note: The “*” character is a wild-card which can be used for bus
names. A “?” character can be used to wild-card one character.
•
NET : reset_n : TIG ;
•
NET : mux_mem/data_reg* : TIG ;
•
NET : mux_mem/data_reg* : TIG = TS01 ;
•
NET : data?_sig : TIG ;
For an input where the maximum clock-to-out (Tco) of the
driving device is 10 ns.
NET in_net_name OFFSET=IN:10:AFTER:clk_net ;
For an output where the minimum setup time (Tsu) of the device
being driven is 5 ns.
NET out_net_name OFFSET=OUT:5:BEFORE:clk_net ;
Ignore timing of net reset_n:
Ignore data_reg(7:0) net in instance mux_mem:
Ignore data_reg(7:0) net in instance mux_mem as related to a
TIMESPEC named TS01 only:
Ignore data1_sig and data2_sig nets:
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