DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 1270

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 22 I/O Ports
22.6.1
Port F is an 8-bit input-only port in the SH7083, SH7084, and SH7085; a 16-bit input-only port in
the SH7086. Port F has the following register. For details on register addresses and register states
during each processing, refer to section 27, List of Registers.
Table 22.11 Register Configuration
22.6.2
The port F data register L (PFDRL) is a 16-bit read-only register that stores port F data. Bits
PF7DR to PF0DR correspond to pins PF7 to PF0 (multiplexed functions omitted here) in the
SH7083, SH7084, and SH7085. Bits PF15DR to PF0DR correspond to pins PF15 to PF0
(multiplexed functions omitted here) in the SH7086.
Any value written into these bits is ignored, and there is no effect on the state of the pins. When
any of the bits are read, the pin state rather than the bit value is read directly. However, when an
A/D converter analog input is being sampled, values of 1 are read out. Table 22.12 summarizes
port F data register L read/write operations.
Rev. 3.00 May 17, 2007 Page 1212 of 1582
REJ09B0181-0300
Register Name
Port F data register L
Register Descriptions
Port F Data Register L (PFDRL)
Abbrevia-
tion
PFDRL
R/W
R
Initial Value
H'xxxx
Address
H'FFFFD382
Access Size
8, 16