DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 975

IC SUPERH MCU FLASH 112LQFP

DF70844AD80FPV

Manufacturer Part Number
DF70844AD80FPV
Description
IC SUPERH MCU FLASH 112LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7080r
Datasheet

Specifications of DF70844AD80FPV

Core Size
32-Bit
Program Memory Size
256KB (256K x 8)
Core Processor
SH-2
Speed
80MHz
Connectivity
EBI/EMI, FIFO, I²C, SCI, SSU
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
76
Ram Memory Size
16KB
Cpu Speed
80MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V, 4.5V To 5.5V
Embedded Interface Type
I2C, SCI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF70844AD80FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
DF70844AD80FPV
Quantity:
5 000
Note:
18.3.6
SAR is an 8-bit readable/writable register that selects the communications format and sets the
slave address. In slave mode with the I
upper seven bits of the first frame received after a start condition, this module operates as the slave
device.
Bit
0
Bit
7 to 1
0
*
I
2
Bit Name
ADZ
Bit Name
SVA[6:0]
FS
When NACKF = 1 is detected, be sure to clear NACKF in the transfer end processing.
Until the flag is cleared, next transmission or reception cannot be started.
C Bus Slave Address Register (SAR)
Initial value:
Initial
Value
0
R/W:
Initial
Value
All 0
0
Bit:
R/W
7
0
R/W
R/W
R/W
R/W
R/W
R/W
2
6
0
C bus format, if the upper seven bits of SAR match the
Description
General Call Address Recognition Flag
This bit is valid in slave receive mode with the I
format.
[Setting condition]
[Clearing condition]
Description
Slave Address 6 to 0
These bits set a unique address in bits SVA6 to SVA0,
differing form the addresses of other slave devices
connected to the I
Format Select
0: I
1: Clock synchronous serial format is selected
R/W
5
0
2
When the general call address is detected in slave
receive mode
When 0 is written to ADZ after reading ADZ=1
C bus format is selected
SVA[6:0]
R/W
4
0
R/W
3
0
Rev. 3.00 May 17, 2007 Page 917 of 1582
R/W
2
C bus.
2
0
Section 18 I
R/W
1
0
R/W
FS
0
0
2
C Bus Interface 2 (I
REJ09B0181-0300
2
C bus
2
C2)

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