DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 261

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

request by IRQ pin
Internal address
DTC activation
Internal address
Note: The DTC request signal indicates the state of internal bus request after the DTC activation source has been determined.
DTC activation
Note: The DTC request signal indicates the state of internal bus request after the DTC activation source has been determined.
DTC request
DTC request
Clock (Bφ)
Clock (Bφ)
request
Data Transferred from On-Chip Peripheral Module to On-Chip RAM;
Data Transferred from On-Chip Peripheral Module to On-Chip RAM;
(Activated by On-Chip Peripheral Module; Iφ: Bφ: Pφ =1: 1/2: 1/2;
Figure 8.14 Example of DTC Operation Timing:
Figure 8.15 Example of DTC Operation Timing:
Vector read
Transfer Information is Written in 3 Cycles)
Transfer Information is Written in 3 Cycles)
Normal or Repeat Transfer with DTPR = 1
(Activated by IRQ; Iφ: Bφ: Pφ =1: 1/2: 1/2;
Vector read
Normal or Repeat Transfer
Transfer information
Transfer information
read
read
transfer
Data
R
transfer
Data
Transfer information
R
W
Rev. 3.00 May 17, 2007 Page 203 of 1582
Section 8 Data Transfer Controller (DTC)
Transfer information
W
write
write
REJ09B0181-0300