DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 444

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 10 Direct Memory Access Controller (DMAC)
10.3
The DMAC has the following registers. See section 27, List of Registers, for the addresses of
these registers and the state of them in each processing status. The SAR for channel 0 is expressed
such as SAR_0.
Table 10.2 Register Configuration
Rev. 3.00 May 17, 2007 Page 386 of 1582
REJ09B0181-0300
Channel
0
1
2
Register Descriptions
Register Name
DMA source
address register_0
DMA destination
address register_0
DMA transfer count
register_0
DMA channel
control register_0
DMA source
address register_1
DMA destination
address register_1
DMA transfer count
register_1
DMA channel
control register_1
DMA source
address register_2
DMA destination
address register_2
DMA transfer count
register_2
DMA channel
control register_2
Abbrevia-
tion
SAR_0
DAR_0
DMATCR_0 R/W
CHCR_0
SAR_1
DAR_1
DMATCR_1 R/W
CHCR_1
SAR_2
DAR_2
DMATCR_2 R/W
CHCR_2
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
H'00000000
H'00000000
H'00000000
H'00000000
H'00000000
H'00000000
H'00000000
H'00000000
H'00000000
H'00000000
H'00000000
H'00000000
Address
H'FFFFEB20
H'FFFFEB24
H'FFFFEB28
H'FFFFEB2C
H'FFFFEB30
H'FFFFEB34
H'FFFFEB38
H'FFFFEB3C
H'FFFFEB40
H'FFFFEB44
H'FFFFEB48
H'FFFFEB4C
Access Size
16, 32
16, 32
16, 32
8, 16, 32
16, 32
16, 32
16, 32
8, 16, 32
16, 32
16, 32
16, 32
8, 16, 32