DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 798

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 15 Serial Communication Interface (SCI)
15.3.8
SCSPTR is an 8-bit register that controls input/output and data for the ports multiplexed with the
SCI function pins. Data to be output through the TXD pin can be specified to control break of
serial transfer. Through bits 3 and 2, data reading and writing through the SCK pin can be
specified. Bit 7 enables or disables RXI interrupts. The CPU can always read and write to
SCSPTR. When reading the value on the SCI pins, use the respective port register. For details,
refer to section 22, I/O Ports.
Rev. 3.00 May 17, 2007 Page 740 of 1582
REJ09B0181-0300
Bit
7
6 to 4
3
Serial Port Register (SCSPTR)
Bit Name
EIO

SPB1IO
Initial value:
Initial
value
0
All 0
0
R/W:
Bit:
R/W
EIO
7
0
R/W
R/W

R/W
6
0
-
-
Description
Error Interrupt Only
Enables or disables RXI interrupts. While the EIO bit is
set to 1, the SCI does not request an RXI interrupt to
the CPU even if the RIE bit is set to 1. If the DMAC is
used while this setting is valid, the CPU only processes
the ERI interrupt. The DMAC transfers the read data to
memory or another peripheral module.
0: The RIE bit enables or disables RXI and ERI
1: While the RIE bit is 1, only the ERI interrupt is sent to
Reserved
These bits are always read as 0. The write value should
always be 0.
Clock Port Input/Output in Serial Port
Specifies the input/output direction of the SCK pin in the
serial port. To output the data specified in the SPB1DT
bit through the SCK pin as a port output pin, set the C/A
bit in SCSMR and the CKE1 and CKE0 bits in SCSCR
to 0.
0: Does not output the SPB1DT bit value through the
1: Outputs the SPB1DT bit value through the SCK pin.
5
0
-
-
interrupts. While the RIE bit is 1, RXI and ERI
interrupts are sent to the INTC.
the INTC.
SCK pin.
4
0
-
-
SPB1IO SPB1DT SPB0IO SPB0DT
R/W
3
0
R/W
2
-
R/W
1
0
R/W
0
-