DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 279

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Name
RASU, RASL
CASU, CASL
CKE
IOIS16
DQMUU
DQMUL
DQMLU
DQMLL
AH
FRAME
WAIT
BREQ
BACK
ICIOWR
ICIORD
WE
I/O
Output Connected to RAS pin when SDRAM is used.
Output Connected to CAS pin when SDRAM is used.
Output Connected to CKE pin when SDRAM is used.
Input
Output Connected to the DQMxx pins when SDRAM is used.
Output Address hold signal when MPX-I/O is used
Output FRAME signal when burst MPX-I/O is used
Input
Input
Output Bus acknowledge output
Output I/O write strobe signal when PCMCIA is used
Output I/O read strobe signal when PCMCIA is used
Output Strobe signal for indicating memory write cycles when PCMCIA is
Function
Indicates 16-bit I/O for PCMCIA.
This LSI does not support little endian and this pin must be held low.
DQMUU: D31 to D24 select signal
DQMUL: D23 to D16 select signal
DQMLU: D15 to D8 select signal
DQMLL: D7 to D0 select signal
External wait input
Bus request input
used
Rev. 3.00 May 17, 2007 Page 221 of 1582
Section 9 Bus State Controller (BSC)
REJ09B0181-0300