DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 501

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

11.3.3
The TIOR registers are 8-bit readable/writable registers that control the TGR registers. The MTU2
has a total of eleven TIOR registers, two each for channels 0, 3, and 4, one each for channels 1 and
2, and three (TIORU_5, TIORV_5, and TIORW_5) for channel 5.
TIOR should be set when TMDR is set to select normal operation, PWM mode, or phase counting
mode. The initial output specified by TIOR is valid when the counter is stopped (the CST bit in
TSTR is cleared to 0). Note also that, in PWM mode 2, the output at the point at which the counter
is cleared to 0 is specified.
When TGRC or TGRD is designated for buffer operation, this setting is invalid and the register
operates as a buffer register.
• TIORH_0, TIOR_1, TIOR_2, TIORH_3, TIORH_4
Bit
7 to 4
3 to 0
Bit Name
IOB[3:0]
IOA[3:0]
Timer I/O Control Register (TIOR)
Initial value:
Initial
Value
0000
0000
R/W:
Bit:
R/W
7
0
R/W
R/W
R/W
R/W
6
0
IOB[3:0]
Description
I/O Control B0 to B3
Specify the function of TGRB.
See the following tables.
TIORH_0: Table 11.12
TIOR_1:
TIOR_2:
TIORH_3: Table 11.16
TIORH_4: Table 11.18
I/O Control A0 to A3
Specify the function of TGRA.
See the following tables.
TIORH_0: Table 11.20
TIOR_1:
TIOR_2:
TIORH_3: Table 11.24
TIORH_4: Table 11.26
R/W
5
0
R/W
4
0
Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
Table 11.14
Table 11.15
Table 11.22
Table 11.23
R/W
3
0
Rev. 3.00 May 17, 2007 Page 443 of 1582
R/W
2
0
IOA[3:0]
R/W
1
0
R/W
0
0
REJ09B0181-0300