DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 477

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

10.4.6
Figures 10.20 and 10.21 illustrate the timing of DMAC operations.
(in the Case of Cycle Stealing Transfer, Dual Address Mode, Low-Level Detection, Iφ:Bφ:Pφ
= 1:1/2:1/2, Data Transfer from External Memory to External Memory, and Idle/Wait = 0)
Figure 10.20 Example of Timing of DMAC Operation—Activation by DREQ
Note: The DMAC request indicates the state of an internal bus request after determination of the source
Operation Timing
DMAC activation request
Internal address
for DMAC activation. For details on the DREQ and DACK timing in each operating mode, see
section 10.4.5, Number of Bus Cycle States and DREQ Pin Sampling Timing.
DMAC request
by DREQ pin
Clock (Bφ)
CSn
Section 10 Direct Memory Access Controller (DMAC)
R
Data transfer
Rev. 3.00 May 17, 2007 Page 419 of 1582
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REJ09B0181-0300