DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 1394

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 26 Power-Down Modes
26.3.6
STBCR6 is an 8-bit readable/writable register that specifies the state of the power-down modes.
Rev. 3.00 May 17, 2007 Page 1336 of 1582
REJ09B0181-0300
Bit
7
6
5 to 2
1
0
Standby Control Register 6 (STBCR6)
Bit Name
AUDSRST
HIZ

STBYMD

Initial value:
Initial
Value
0
0
All 0
0
0
R/W:
Bit:
SRST
R/W
AUD
7
0
R/W
R/W
R/W
R
R/W
R
R/W
HIZ
6
0
Description
AUD Software Reset
This bit controls the AUD reset by software. When 0 is
written to AUDSRST, the AUD module shifts to the
power-on reset state.
0: Shifts to the AUD reset state
1: Clears the AUD reset
When setting this bit to 1, the MSTP25 bit in STBCR5
should be 0.
Port High-Impedance
In software standby mode, this bit selects whether the
pin state is retained or changed to high-impedance.
0: In software standby mode, the pin state is retained
1: In software standby mode, the pin state is changed
Reserved
These bits are always read as 0. The write value should
always be 0.
Software Standby Mode Select
This bit selects a transition to software standby mode or
deep software standby mode by executing the SLEEP
instruction when the STBY bit is 1 in STBCR1.
0: Transition to deep software standby mode
1: Transition to software standby mode
Reserved
This bit is always read as 0. The write value should
always be 0.
R
5
0
-
to high-impedance
R
4
0
-
R
3
0
-
R
2
0
-
STBY
R/W
MD
1
0
R
0
0
-