DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 812
DF70844AD80FPV
Manufacturer Part Number
DF70844AD80FPV
Description
IC SUPERH MCU FLASH 112LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7080r
Datasheet
1.DF70844AD80FPV.pdf
(1644 pages)
Specifications of DF70844AD80FPV
Core Size
32-Bit
Program Memory Size
256KB (256K x 8)
Core Processor
SH-2
Speed
80MHz
Connectivity
EBI/EMI, FIFO, I²C, SCI, SSU
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
76
Ram Memory Size
16KB
Cpu Speed
80MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V, 4.5V To 5.5V
Embedded Interface Type
I2C, SCI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF70844AD80FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 15 Serial Communication Interface (SCI)
15.4
15.4.1
For serial communication, the SCI has an asynchronous mode in which characters are
synchronized individually, and a clock synchronous mode in which communication is
synchronized with clock pulses.
Asynchronous or clock synchronous mode is selected and the transmit format is specified in the
serial mode register (SCSMR) as shown in table 15.13. The SCI clock source is selected by the
combination of the C/A bit in SCSMR and the CKE1 and CKE0 bits in the serial control register
(SCSCR) as shown in table 15.14.
(1)
• Data length is selectable: 7 or 8 bits.
• Parity bit is selectable. So is the stop bit length (1 or 2 bits). The combination of the preceding
• In receiving, it is possible to detect framing errors, parity errors, overrun errors, and breaks.
• An internal or external clock can be selected as the SCI clock source.
(2)
• The transmission/reception format has a fixed 8-bit data length.
• In receiving, it is possible to detect overrun errors.
• An internal or external clock can be selected as the SCI clock source.
Rev. 3.00 May 17, 2007 Page 754 of 1582
REJ09B0181-0300
selections constitutes the communication format and character length.
When an internal clock is selected, the SCI operates using the clock supplied by the on-
When an external clock is selected, the external clock input must have a frequency 16 times
When an internal clock is selected, the SCI operates using the on-chip baud rate generator,
When an external clock is selected, the SCI operates on the input serial clock. The on-chip
Asynchronous Mode
Clock Synchronous Mode
chip baud rate generator and can output a clock with a frequency 16 times the bit rate.
the bit rate. (The on-chip baud rate generator is not used.)
and outputs a serial clock signal to external devices.
baud rate generator is not used.
Operation
Overview
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