DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 403

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Basic Timing for Memory Card Interface: Figure 9.38 shows the basic timing of the PCMCIA
IC memory card interface. If areas 5 and 6 are specified as the PCMCIA interface, accessing the
common memory areas in areas 5 and 6 automatically accesses the bus with the IC memory card
interface. If the external bus frequency (CK) increases, the setup times and hold times for the
address pins (A25 to A0), card enable signals (CE1A, CE1B, CE2A, CE2B), and write data (D15
to D0) to the RD and WE signals become insufficient. To prevent this error, this LSI enables the
setup times and hold times for areas 5 and 6 to be specified independently, using CS5WCR and
CS6WCR. In the PCMCIA interface, as in the normal space interface, a software wait or hardware
wait using the WAIT pin can be inserted. Figure 9.39 shows the PCMCIA memory bus wait
timing.
This LSI
D15 to D8
A25 to A0
D7 to D0
I/O ports
ICIOWR
ICIORD
RDWR
IOIS16
Figure 9.37 Example of PCMCIA Interface Connection
CE1A
CE2A
WAIT
WE
RD
DIR
DIR
G
G
G
G
detector
Card
Rev. 3.00 May 17, 2007 Page 345 of 1582
Section 9 Bus State Controller (BSC)
(memory or I/O)
A25 to A0
D7 to D0
D15 to D8
CE1
CE2
OE
WE/PGM
IORD
IOWR
REG
WAIT
IOIS16
CD1, CD2
PC card
REJ09B0181-0300