EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 114

• Manufacturer Part Number: EP4SE530H40I3
• Description: IC STRATIX IV FPGA 530K 1517HBGA
• Manufacturer: Altera
• Series: STRATIX® IV Er

Specifications of EP4SE530H40I3

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 976
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1517-HBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

4–34
Table 4–9. DSP Block Dynamic Signals (Part 1 of 2)
Stratix IV Device Handbook Volume 1
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■
output_round
chainout_round
output_saturate
chainout_saturate
signa
signb
Signal Name
DSP Block Control Signals
Use the rounding and saturation function just described in regular supported
multiplication operations, as specified in
accumulation-type operations, use the following convention:
The functionality of the round logic unit is in the format of:
Likewise, the functionality of the saturation logic unit is in the format of:
If you use both the rounding and saturation logic units for an accumulation type of
operation, the format is:
The Stratix IV DSP block is configured using a set of static and dynamic signals. You
can configure the DSP block dynamic signals. You can set the signals to toggle or not
toggle at run time.
Result = RND[
Result = SAT[
Result = SAT[RND[
Signed/unsigned control for all multipliers and adders.
■
■
■
■
■
■
Round control for the first stage round and saturation block.
■
■
Round control for the second stage round and saturation block.
■
■
Saturation control for the first stage round and saturation block for
Q-format multiply. If you enable both rounding and saturation,
saturation is done on the rounded result.
■
■
Saturation control for the second stage round and saturation block for
Q-format multiply. If you enable both rounding and saturation,
saturation is done on the rounded result.
■
■
signa for “multiplicand” input bus to dataa[17:0] to each
multiplier
signb for “multiplier” input bus datab[17:0] to each multiplier
signa = 1, signb = 1 for signed-signed multiplication
signa = 1, signb = 0 for signed-unsigned multiplication
signa = 0, signb = 1 for unsigned-signed multiplication
signa = 0, signb = 0 for unsigned-unsigned multiplication
output_round = 1 for rounding on multiply output
output_round = 0 for normal multiply output
chainout_round = 1 for rounding multiply output
chainout_round = 0 for normal multiply output
output_saturate = 1 for saturation support
output_saturate = 0 for no saturation support
chainout_saturate = 1 for saturation support
chainout_saturate = 0 for no saturation support
S
S
(A × B)], when used for an accumulation type of operation.
Table 4–9
(A × B)], when used for an accumulation type of operation.
S
(A × B)]]
lists the dynamic signals for the DSP block.
Function
Table 4–2 on page
Chapter 4: DSP Blocks in Stratix IV Devices
Stratix IV Operational Mode Descriptions
4–8. However, for
February 2011 Altera Corporation
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