EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 917

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EP4SE530H40I3

Manufacturer Part Number
EP4SE530H40I3
Description
IC STRATIX IV FPGA 530K 1517HBGA
Manufacturer
Altera
Series
STRATIX® IV Er

Specifications of EP4SE530H40I3

Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
976
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1517-HBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-

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0
Chapter 5: Dynamic Reconfiguration in Stratix IV Devices
Dynamic Reconfiguration Modes Implementation
February 2011 Altera Corporation
Table 5–14
unit interval (UI).
Table 5–14. EyeQ Phase Step Encoding
Desired Phase Step
Setting
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
0
1
2
3
4
5
6
7
8
9
lists the EyeQ phase step encoding for the 32 phase steps spanning one
EyeQ Phase Step Encoding
6'b111111
6'b111110
6'b111101
6'b111100
6'b111011
6'b111010
6'b111001
6'b111000
6'b110111
6'b110110
6'b110101
6'b110100
6'b110011
6'b110010
6'b110001
6'b110000
6'b010000
6'b010001
6'b010010
6'b010011
6'b010100
6'b010101
6'b010110
6'b010111
6'b011000
6'b011001
6'b011010
6'b011011
6'b011100
6'b011101
6'b011110
6'b011111
Stratix IV Device Handbook Volume 2: Transceivers
5–71

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