EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 601

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EP4SE530H40I3

Manufacturer Part Number
EP4SE530H40I3
Description
IC STRATIX IV FPGA 530K 1517HBGA
Manufacturer
Altera
Series
STRATIX® IV Er

Specifications of EP4SE530H40I3

Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
976
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1517-HBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-

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Chapter 1: Transceiver Architecture in Stratix IV Devices
Transceiver Block Architecture
Figure 1–124. Transceiver Datapath in XAUI Mode
February 2011 Altera Corporation
rx_coreclk[3:2]
tx_coreclk[1:0]
rx_coreclk[1:0]
tx_coreclk[3:2]
FPGA Fabric-Transceiver
FPGA
Fabric
Interface Clock
coreclkout
XAUI Mode Datapath
Figure 1–124
in XAUI mode.
/2
Reference
Reference
Clock
Clock
Input
Input
Compensation
Compensation
Channel 0
Channel 2
Channel 0
RX Phase
shows the ALTGX megafunction transceiver datapath when configured
Channel 1
RX Phase
Channel 3
Channel 1
FIFO
CMU1_PLL
CMU0_PLL
Channel 3
Channel 2
FIFO
Compensation
Compensation
wrclk
wrclk
TX Phase
TX Phase
FIFO
FIFO
rdclk
rdclk
serializer
serializer
Byte
De-
Byte
/2
De-
/2
wrclk
wrclk
Serializer
Serializer
Divider
CMU1
Clock
Divider
CMU0
Clock
Byte
Byte
/2
/2
rdclk
rdclk
CMU1_Channel
CMU0_Channel
Low-Speed Parallel Clock from CMU 0 Clock Divider
Decoder
8B/10B
Low-Speed Parallel Clock from CMU 0 Click Divider
Low-Speed Parallel Clock from CMU 0 Clock Divider
Decoder
Low-Speed Parallel Clock from CMU 0 Clock Divider
8B/10B
Transmitter Channel PCS
Transmitter Channel PCS
Match
Rate
FIFO
Match
FIFO
Rate
Receiver Channel PCS
Recovered Clock
Recovered Clock
Low-Speed Parallel Clock
High-Speed Serial Clock
Encoder
8B/10B
Encoder
8B/10B
Receiver Channel PCS
Ch0 Parallel
Ch0 Parallel
Stratix IV Device Handbook Volume 2: Transceivers
Deskew
Deskew
FIFO
FIFO
Aligner
Word
Aligner
Word
Receiver Channel PMA
Serializer
Transmitter Channel PMA
Transmitter Channel PMA
Receiver Channel PMA
serializer
Recovered Clock
De-
Recovered Clock
De-
Serializer
Serializer
Ch2 Parallel
Ch0 Parallel
CDR
CDR
1–157

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