EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 324

• Manufacturer Part Number: EP4SE530H40I3
• Description: IC STRATIX IV FPGA 530K 1517HBGA
• Manufacturer: Altera
• Series: STRATIX® IV Er

Specifications of EP4SE530H40I3

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 976
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1517-HBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

8–46
Document Revision History
Table 8–12. Document Revision History (Part 1 of 2)
Stratix IV Device Handbook Volume 1
February 2011
March 2010
November 2009
June 2009
April 2009
March 2009
Date
Version
Table 8–12
3.0
3.2
3.1
2.3
2.2
2.1
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Updated
Updated the
External PLL Option
Differential Channels”
Applied new template.
Minor text edits.
Removed note 7 from Table 8–1 and Table 8–2.
Updated Figure 8–5.
Updated the “LVDS Channels” section.
Updated Table 8–7.
Added a note to the “LVDS Interface with the Use External PLL Option Enabled” and
“ALTLVDS Port List” sections.
Minor text edits.
Changed “dedicated LVDS” to “true LVDS”.
Removed EP4SE110, EP4SE290, and EP4SE680 devices.
Added EP4SE820 and Stratix IV GT devices.
Updated “LVDS Channels”, “Differential Transmitter”, “Soft-CDR Mode”, and “DPA-
Enabled Channels and Single-Ended I/Os” sections.
Updated Table 8–1, Table 8–2, Table 8–5, and Table 8–6.
Added Table 8–3 and Table 8–4.
Updated Example 8–1.
Updated Figure 8–22.
Minor text edits.
Added an introductory paragraph to increase search ability.
Minor text edits.
Updated “Introduction”.
Updated Figure 8–3.
Removed Table 8-5 and Table 8-6.
Updated “Introduction”, “Stratix IV LVDS Channels”, “Stratix IV Differential Transmitter”,
“Differential I/O Termination”, and “Dynamic Phase Alignment (DPA) Block” sections.
Updated Table 8–1, Table 8–2, Table 8–3, Table 8–4, and Table 8–7.
Added Table 8–5 and Table 8–6.
Updated Figure 8–2.
Removed “Referenced Documents” section.
lists the revision history for this chapter.
Table
“Differential
8–10.
Chapter 8: High-Speed Differential I/O Interfaces and DPA in Stratix IV Devices
Enabled”, “Deserializer”, and
sections.
Transmitter”,
Changes
“Non-DPA
Mode”,
“Guidelines for DPA-Disabled
“LVDS Interface with the Use
February 2011 Altera Corporation
Document Revision History