EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 446

• Manufacturer Part Number: EP4SE530H40I3
• Description: IC STRATIX IV FPGA 530K 1517HBGA
• Manufacturer: Altera
• Series: STRATIX® IV Er

Specifications of EP4SE530H40I3

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 976
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1517-HBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

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Stratix IV Device Handbook Volume 2: Transceivers
f
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Stratix IV GT devices are also part of Altera’s 40 nm Stratix IV device family and
contain serial transceivers that support data rates between 600 Mbps and 11.3 Gbps.
Stratix IV GT devices are targeted towards implementing 40 Gbps/100 Gbps
transceiver links. Example applications include 40G/100G Ethernet and SFI-S.
Stratix IV GT devices can be broadly classified into the following:
■
■
Though optimized for 40 Gbps/100 Gbps systems, Stratix IV GT transceivers also
provide PMA and PCS support for the protocols shown in
Table 1–2. Serial Protocols Supported by the Stratix IV GT Transceiver Channels
To implement proprietary protocols, the transceiver channels in the Stratix IV GT
device support the highly flexible Basic single-width (600 Mbps to 3.75 Gbps) and
Basic double-width (600 Mbps to 11.3 Gbps) functional modes.
Stratix IV GX and GT devices have PCIe hard IP, PCS, and PMA blocks. For more
information, refer to the
For more information about Stratix IV GX and GT protocols, refer to the
Multiple Protocols and Data Rates in Stratix IV Devices
PCIe
XAUI
GIGE
Serial RapidIO
SONET/SDH
(OIF) CEI PHY Interface
Serial Digital Interface (SDI)
Stratix IV GT devices targeted to achieve 100 Gbps ingress/egress data rates—48
full duplex clock and clock data recovery (CDR)-based transceivers, 32 of which
support data rates up to 11.3 Gbps
Stratix IV GT devices targeted to achieve 40 Gbps ingress/egress data rates—36
full duplex CDR-based transceivers, 12 of which support data rates up to
11.3 Gbps
Protocol
PCI Express Compiler User
Gen 1 at 2.5 Gbps and Gen 2 at 5.0 Gbps
3.125 Gbps up to HiGig at 3.75 Gbps
1.25 Gbps
2.5 Gbps and 3.125 Gbps
OC-48 and OC-96
4.976 Gbps to 6.375 Gbps
3G-SDI at 2.97Gbps and 2.967 Gbps
Chapter 1: Transceiver Architecture in Stratix IV Devices
Guide.
chapter.
Description
Table
February 2011 Altera Corporation
1–2.
Configuring
Overview