EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 830

• Manufacturer Part Number: EP4SE530H40I3
• Description: IC STRATIX IV FPGA 530K 1517HBGA
• Manufacturer: Altera
• Series: STRATIX® IV Er

Specifications of EP4SE530H40I3

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 976
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1517-HBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

4–24
PMA Direct Drive Mode Reset Sequences
Table 4–7. Reset and Power-Down Sequences for PMA Direct Drive ×N Configurations
Stratix IV Device Handbook Volume 2: Transceivers
Transmitter Only with no PLL_L/R
Transmitter Only with a PLL_L/R
Receiver and Transmitter
Receiver and Transmitter
Channel Set Up
1
1
You can configure the Stratix IV device in ×1, ×4, and ×8 PCIe configurations. The
reset sequence described in
multi-lane configurations.
Stratix IV devices provide a PMA Direct mode in which all PCS blocks, including the
phase compensation FIFOs, are bypassed in both the transmitter and receiver channel
data paths. In this mode, the PMA block in the transmitter and receiver channels
directly interface with the FPGA fabric.
In PMA Direct drive mode, you can configure the transceiver channels as a single
channel or in bonded configurations. Basic single- and double-width functional
modes support bonding of PMA functional blocks across all transceiver channels on
the same side of the device.
The tx_digitalreset and rx_digitalreset signals are not available because there
are no PCS blocks available in this mode.
Table 4–7
functional mode.
lists the reset and power-down sequences for PMA Direct drive ×N
Basic (PMA Direct) drive ×4
Manual lock mode
Automatic lock mode for Basic
(PMA Direct) drive ×N mode
Manual lock mode for Basic
(PMA Direct) drive ×N mode
Functional Mode
“PCIe Reset Sequence” on page 4–22
Chapter 4: Reset Control and Power Down in Stratix IV Devices
“Transmitter Only Channel with No PLL_L/R” on
page 4–25
“Transmitter Only Channel with a PLL_L/R” on
page 4–26
“Receiver and Transmitter Channel Set-up—
Receiver CDR in Automatic Lock Mode” on
page 4–28
“Receiver and Transmitter Channel Set-up—
Receiver CDR in Manual Lock Mode” on
page 4–30
PMA Direct Drive Mode Reset Sequences
February 2011 Altera Corporation
Refer to
applies to all these