EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 866

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EP4SE530H40I3

Manufacturer Part Number
EP4SE530H40I3
Description
IC STRATIX IV FPGA 530K 1517HBGA
Manufacturer
Altera
Series
STRATIX® IV Er

Specifications of EP4SE530H40I3

Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
976
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1517-HBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-

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5–20
Stratix IV Device Handbook Volume 2: Transceivers
Memory Initialization File (.mif)
As listed in
“.mif Requirement” column use memory initialization files to reconfigure the
transceivers. These .mifs contain the valid settings, in the form of words, required to
reconfigure the transceivers. To understand using .mifs, it is helpful to understand
these two concepts:
Quartus II Settings to Enable .mif Generation
The .mif is not generated by default in a Quartus II compilation. To generate a .mif,
you must enable the following Quartus II software settings:
1. On the Assignments menu, select Settings
Figure 5–10. Step 1 to Enable .mif Generation
How to generate a .mif?—The Quartus
provide the appropriate project settings and then compiles an ALTGX instance.
For more information, refer to
page
How is a .mif used between the ALTGX_RECONFIG instance and the ALTGX
instance?—The Quartus II software provides a design flow called the user
memory initialization file flow. For more information, refer to
Flow” on page
5–20.
Table
5–5, all the dynamic reconfiguration modes with a check mark in the
5–22.
“Quartus II Settings to Enable .mif Generation” on
®
Chapter 5: Dynamic Reconfiguration in Stratix IV Devices
II software generates .mifs when you
(Figure
Dynamic Reconfiguration Modes Implementation
5–10).
February 2011 Altera Corporation
“.mif-Based Design

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