R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 173

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

6.4
6.4.1
Format
ADD Rm,Rn
ADD #imm,Rn
Description
Adds general register Rn data to Rm data, and stores the result in Rn. 8-bit immediate data can be
added instead of Rm data. Since the 8-bit immediate data is sign-extended to 32 bits, this
instruction can add and subtract immediate data.
Operation
Examples:
ADD(long m,long n)
{
}
ADDI(long i,long n) /* ADD #imm,Rn */
{
}
ADD
ADD
ADD
R[n]+=R[m];
PC+=2;
if ((i&0x80)==0) R[n]+=(0x000000FF & (long)i);
else R[n]+=(0xFFFFFF00 | (long)i);
PC+=2;
R0,R1
#H'01,R2
#H'FE,R3
SH-2E CPU Instructions
ADD
Binary Addition
; Before execution: R0 = H'7FFFFFFF, R1 = H'00000001
; After execution:
; Before execution: R2 = H'00000000
; After execution:
; Before execution: R3 = H'00000001
; After execution:
Abstract
Rm + Rn → Rn
Rn + imm → Rn
/* ADD Rm,Rn */
ADD Binary
R1 = H'80000000
R2 = H'00000001
R3 = H'FFFFFFFF
Code
0011nnnnmmmm1100
0111nnnniiiiiiii
Rev. 3.00 Jul 08, 2005 page 157 of 484
Section 6 Instruction Descriptions
Arithmetic Instruction
Cycle
1
1
REJ09B0051-0300
T Bit
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