R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 471

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

(8) Double-Precision Floating-Point Register to Register Data Transfer Instructions
Instruction Types
Pipeline
Operation
The CPU pipeline ends after four stages – IF, ID, EX, EX – and the FPU pipeline after six stages –
IF, DF, EX, EX, NA, SF. Contention does not occur even if one of these instructions is
immediately followed by an instruction that reads the destination of that instruction.
Instruction Issuance
This instruction uses the FPU load/store pipeline.
Parallel Execution Capability
No particular comments
Instruction A
Next instruction
Instruction after next
FMOV
DRm,DRn
↔ ↔ ↔ ↔ ↔ ↔ ↔ Slots
IF
IF
IF
IF
DF
⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅
⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅
ID
IF
IF
EX
EX
DF
⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅
⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅
ID
EX
EX
EX
DF
E1
ID
NA
⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅
EX
E2
E1
SF
SF
⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅
E2
Rev. 3.00 Jul 08, 2005 page 455 of 484
SF
Section 8 Pipeline Operation
: CPU pipeline
: FPU pipeline
: CPU pipeline
: FPU pipeline
: CPU pipeline
: FPU pipeline
REJ09B0051-0300