R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 38

IC SUPERH MPU ROMLESS 240QFP

R5S72030W200FP

Manufacturer Part Number
R5S72030W200FP
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheets

Specifications of R5S72030W200FP

Core Processor
SH2A-FPU
Core Size
32-Bit
Speed
200MHz
Connectivity
CAN, I²C, SCI, SSI, SSU, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
82
Program Memory Type
ROMless
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
240-QFP
For Use With
R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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Section 3 Exception Handling
3.3
3.3.1
Address errors occur in instruction fetches and data read/write accesses, as shown in table 3.5.
Table 3.5
Note: * For details of the on-chip peripheral module space, see the Bus State Controller section of
Rev. 3.00 Jul 08, 2005 page 22 of 484
REJ09B0051-0300
Type
Instruction
fetch
Data
read/write
the hardware manual for the relevant product.
Bus Cycle
Address Errors
Address Error Sources
Bus Cycles and Address Errors
Bus Master
CPU
CPU or
DMAC
Bus Cycle Operation
Instruction fetched from even address
Instruction fetched from odd address
Instruction fetched from other than on-chip
peripheral module space *
Instruction fetched from on-chip peripheral
module space *
Instruction fetched from external memory
space in single-chip mode
Word data accessed from even address
Word data accessed from odd address
Longword data accessed from longword
boundary
Longword data accessed from other than
longword boundary
Double longword data accessed from double
longword boundary
Double longword data accessed from other
than double longword boundary
Word data or byte data accessed in on-chip
peripheral module space *
Longword data accessed in 16-bit on-chip
peripheral module space *
Longword data accessed in 8-bit on-chip
peripheral module space *
External memory space accessed in single-
chip mode
Address Error
Occurrence
No error (normal)
Address error
No error (normal)
Address error
Address error
No error (normal)
Address error
No error (normal)
Address error
No error (normal)
Address error
No error (normal)
No error (normal)
No error (normal)
Address error

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