R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 35

IC SUPERH MPU ROMLESS 240QFP

R5S72030W200FP

Manufacturer Part Number
R5S72030W200FP
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheets

Specifications of R5S72030W200FP

Core Processor
SH2A-FPU
Core Size
32-Bit
Speed
200MHz
Connectivity
CAN, I²C, SCI, SSI, SSU, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
82
Program Memory Type
ROMless
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
240-QFP
For Use With
R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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The vector numbers and vector table address offsets are shown in table 3.3, and the method of
calculating the vector table address in table 3.4.
Table 3.3
Note: * For the vector numbers and address offsets of external interrupts and on-chip peripheral
Exception Source
Power-on reset
Manual reset
General illegal instruction
RAM error
Slot illegal instruction
(Reserved for system)
CPU address error
DMAC address error
Interrupt
FPU exception
H-UDI
Bank overflow
Bank underflow
Integer division exception
(division by zero)
Integer division exception (overflow)
(Reserved for system)
Trap instruction (user vector)
External interrupt (IRQ), on-chip
peripheral module *
module interrupts, see “Internal Module Interrupt Exception Handling Vectors and Priority
Order” in the Interrupt Controller section of the hardware manual.
Exception Vector Table
PC
SP
PC
SP
NMI
User break
Vector Number
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
31
32
63
64
511
Rev. 3.00 Jul 08, 2005 page 19 of 484
Vector Table Address Offset
H'00000000 to H'00000003
H'00000004 to H'00000007
H'00000008 to H'0000000B
H'0000000C to H'0000000F
H'00000010 to H'00000013
H'00000014 to H'00000017
H'00000018 to H'0000001B
H'0000001C to H'0000001F
H'00000020 to H'00000023
H'00000024 to H'00000027
H'00000028 to H'0000002B
H'0000002C to H'0000002F
H'00000030 to H'00000033
H'00000034 to H'00000037
H'00000038to H'0000003B
H'0000003C to H'0000003F
H'00000040 to H'00000043
H'00000044 to H'00000047
H'00000048 to H'0000004B
H'0000004C to H'0000004F
H'0000007C to H'0000007F
H'00000080 to H'00000083
H'000000FC to H'000000FF
H'00000100 to H'00000103
H'000007FC to H'000007FF
Section 3 Exception Handling
REJ09B0051-0300

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