R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 29
R5S72030W200FP
Manufacturer Part Number
R5S72030W200FP
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Specifications of R5S72030W200FP
Core Processor
SH2A-FPU
Core Size
32-Bit
Speed
200MHz
Connectivity
CAN, I²C, SCI, SSI, SSU, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
82
Program Memory Type
ROMless
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
240-QFP
For Use With
R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5S72030W200FP
Manufacturer:
SAMSUNG
Quantity:
1 001
Company:
Part Number:
R5S72030W200FP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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2.4
The CPU has five processing states: the reset state, exception handling state, bus-released state,
program execution state, and power-down state. Figure 2.5 shows the state transitions.
Bus request
Processing States
Interrupt or DMA address error
Bus-released state
Power-on reset state
Bus request
cleared
Bus request
cleared
Power-on reset
from any state
Figure 2.5 Processing State Transitions
Sleep mode
Bus
request
cleared
Bus
request
Bus
request
Standby input from any state
Hardware standby mode
Exception-handling state
Program execution state
Exception
handling
request
SLEEP
instruction with
STBY bit cleared
Reset release
End of exception
handling
Rev. 3.00 Jul 08, 2005 page 13 of 484
Software standby mode
Manual reset state
Section 2 Programming Model
SLEEP
instruction with
STBY bit set
Manual reset
from any state
Power-down state
NMI or IRQ interrupt
Reset state
REJ09B0051-0300
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