R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 177

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

6.4.4
Format
AND
AND
AND.B #imm, @(R0,GBR)
Description
Logically ANDs the contents of general registers Rn and Rm, and stores the result in Rn. The
contents of general register R0 can be ANDed with zero-extended 8-bit immediate data. 8-bit
memory data pointed to by GBR relative addressing can be ANDed with 8-bit immediate data.
Note
After AND #imm, R0 is executed and the upper 24 bits of R0 are always cleared to 0.
Rm,Rn
#imm,R0
AND
Logical AND
Abstract
Rn & Rm → Rn
R0 & imm → R0
(R0 + GBR) & imm → (R0 + GBR)
AND logical
Rev. 3.00 Jul 08, 2005 page 161 of 484
Code
0010nnnnmmmm1001
11001001iiiiiiii
11001101iiiiiiii
Section 6 Instruction Descriptions
Logical Instruction
REJ09B0051-0300
Cycle
1
1
3
T Bit
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