R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 18
R5S72030W200FP
Manufacturer Part Number
R5S72030W200FP
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Specifications of R5S72030W200FP
Core Processor
SH2A-FPU
Core Size
32-Bit
Speed
200MHz
Connectivity
CAN, I²C, SCI, SSI, SSU, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
82
Program Memory Type
ROMless
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
240-QFP
For Use With
R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5S72030W200FP
Manufacturer:
SAMSUNG
Quantity:
1 001
Company:
Part Number:
R5S72030W200FP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 1 Overview
Item
Floating-Point Unit
(FPU)
Rev. 3.00 Jul 08, 2005 page 2 of 484
REJ09B0051-0300
Features
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Note: FMAC is supported for single-precision only.
•
On-chip floating-point coprocessor
Supports single-precision (32 bits) and double-precision (64 bits)
Supports IEEE754-compliant data types and exceptions
Two rounding modes: Round to Nearest and Round to Zero
Handling of denormalized numbers: Truncation to zero
Floating-point registers
Sixteen 32-bit floating-point registers
Two 32-bit floating-point system registers
Supports FMAC (multiply and accumulate) instruction
Supports FDIV (divide) and FSQRT (square root) instructions
Supports FLDI0/FLDI1 (load constant 0/1) instructions
Instruction execution times
Latency (FMAC/FADD/FSUB/FMUL): 3 cycles (single-precision), 8
Pitch (FMAC/FADD/FSUB/FMUL): 1 cycle (single-precision), 6
Five-stage pipeline
(single-precision x 16 words or double-precision x 8 words)
cycles (double-precision)
cycles (double-precision)
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