R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 470

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 8 Pipeline Operation
(7) Some floating-point register-register transfer instructions, floating-point register-
Instruction Types
Pipeline
Operation
The CPU pipeline ends after three stages – IF, ID, EX – and the FPU pipeline after five stages –
IF, DF, EX, NA, SF. Contention does not occur even if one of these instructions is immediately
followed by an instruction that reads the destination of that instruction.
Instruction Issuance
These instructions use the FPU load/store pipeline.
Parallel Execution Capability
These are zero-latency instructions. Parallel execution is possible even if one of these instructions
is executed as a preceding instruction and the succeeding instruction uses FRn, FPUL.
Rev. 3.00 Jul 08, 2005 page 454 of 484
REJ09B0051-0300
Instruction A
Next instruction
Instruction after next
FLDS
FMOV
FSTS
FLDI0
FLDI1
FABS
FNEG
FABS
FNEG
immediate instructions, and floating-point operation instructions
FRm,FPUL
FRm,FRn
FPUL,FRn
FRn
FRn
FRn
FRn
DRn
DRn
↔ ↔ ↔ ↔ ↔ ↔ ↔ Slots
IF
IF
IF
IF
DF
DF
ID
ID
IF
IF
EX
EX
EX
DF
E1
ID
NA
⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅
EX
E2
E1
SF
SF
⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅
E2
E3
: CPU pipeline
: FPU pipeline
: CPU pipeline
: FPU pipeline
: CPU pipeline
: FPU pipeline