SI4010-C2-GT Silicon Laboratories Inc, SI4010-C2-GT Datasheet - Page 130

• Manufacturer Part Number: SI4010-C2-GT
• Description: IC TX 27-960MHZ FSK 3.6V 10MSOP
• Manufacturer: Silicon Laboratories Inc
• Series: EZRadio®r
• Type: Crystalless SoC RF Transmitterr

Specifications of SI4010-C2-GT

• Package / Case: 10-MSOP
• Mfg Application Notes: SI4010 Calculator Spreadsheet AppNote
• Frequency: 27MHz ~ 960MHz
• Applications: Garage Openers, RKE, Security Alarms
• Modulation Or Protocol: FSK, OOK
• Data Rate - Maximum: 100 kBaud
• Power - Output: 10dBm
• Current - Transmitting: 19.8mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Memory Size: 4kB RAM
• Features: 8051 MCU Core, Crystal-less Operation
• Voltage - Supply: 1.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Operating Frequency: 27 MHz to 960 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 1.8 V to 3.6 V
• Supply Current: 14.2 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 336-1997-5

Si4010-C2
SFR Definition 33.1. RTC_CTRL
SFR Address = 0x9C
130
Name RTC_INT RTC_ENA RTC_CLR Reserved
Reset
4:3
2:0
Bit
Type
7
6
5
Bit
RTC_ENA
RTC_CLR
Reserved
RTC_DIV
RTC_INT
Name
[2:0]
R/W
7
0
Real Time Clock Interrupt Flag.
Set after the time interval set by RTC_DIV field elapses. Software must clear the flag.
Hardware will not clear the flag
Real Time Clock Enable.
If set to 1 then the RTC_TICK and bottom part of the pulse generator starts running
where it left off. If RTC_DIV >=3 then top half also starts.
0: RTC disabled
1: RTC enabled.
Real Time Clock Clear.
Writing 1 will clear the pulse generator but will leave the RTC_TICK generator intact.
See the RTC_TICKCLR in the SYSGEN register for clearing the RTC_TICK counter.
0: Normal operation
1: RTC cleared
Read as 0x00. Write has no effect.
Real Time Clock Divider.
Select the divider of the RTC_TICK to determine the interval for the RTC interrupt
generation.
000: No interrupt generation
001: 100 µs .. it is a 19/19/19/18 divider
010: 200 µs .. it is a 38/37 divider
011: 400 µs
100: 800 µs
101: 1 ms
110: 2 ms
111: 5 ms
R/W
6
0
W
5
0
Rev. 1.0
R
4
0
Function
Reserved
R
3
0
2
0
RTC_DIV[2:0]
R/W
1
0
0
0