SI4010-C2-GT Silicon Laboratories Inc, SI4010-C2-GT Datasheet - Page 81

• Manufacturer Part Number: SI4010-C2-GT
• Description: IC TX 27-960MHZ FSK 3.6V 10MSOP
• Manufacturer: Silicon Laboratories Inc
• Series: EZRadio®r
• Type: Crystalless SoC RF Transmitterr

Specifications of SI4010-C2-GT

• Package / Case: 10-MSOP
• Mfg Application Notes: SI4010 Calculator Spreadsheet AppNote
• Frequency: 27MHz ~ 960MHz
• Applications: Garage Openers, RKE, Security Alarms
• Modulation Or Protocol: FSK, OOK
• Data Rate - Maximum: 100 kBaud
• Power - Output: 10dBm
• Current - Transmitting: 19.8mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Memory Size: 4kB RAM
• Features: 8051 MCU Core, Crystal-less Operation
• Voltage - Supply: 1.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Operating Frequency: 27 MHz to 960 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 1.8 V to 3.6 V
• Supply Current: 14.2 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 336-1997-5

24.11. Retest and Retest Configuration
When the part is programmed as a Run part, the C2 interface is disabled and nobody can access the part
externally. However, Silicon Labs needs to be able to retest the part in case it returns as a failed part from
a customer application. Silicon Labs understands that customer may have programmed sensitive informa-
tion into the NVM which should not be revealed to anybody, not even to Silicon Labs, during the retest pro-
cess. During the process of making the part a Run part the user will have one time option to control the
access to the chip during the retest process.
To be able to retest the fully programmed Run part, a special sequence of pin values needs to be applied
at a particular time during the boot process. Once that sequence is recognized by the part, the boot pro-
cess loads only the Factory region of the NVM and will not load any of the User regions from the NVM.
Then before the boot process opens the C2 interface for factory retest communication, it consults the user
retest protection control flags programmed into the PROT3_CTRL byte in NVM when the part was made a
Run part and acts on the values immediately. Only after all the actions prescribed by the flags settings are
completed can the chip open for retest communication.
When making a Run part, the user can set the following retest protection flags when using the NVM
programmer.
Note that if the bits are set into the PROT3_CTRL NVM byte before the part is programmed as Run part
(for example, those bits are set when making a User part), the settings are ignored. The boot process will
monitor these values only after the part is programmed to be the Run part.
c2_off
mem_c2_prot
Flag Name
Table 24.2. Run Chip Retest Protection Flags: NVM Programmer
Disable the C2 interface for good. No retest possible. 
Warning : When set then the part is locked out, C2 interface is disabled forever, and SiLabs
cannot retest the chip. There is no back door to the part. All other settings below are ignored,
since they have no effect. 

This bit is set in PROT0_CTRL.C2_OFF and it corresponds to C2 Disable checkbox on the
NVM programmer GUI.
Protect CODE/XDATA and IRAM RAM memories. When set then the boot process clears
CODE/XDATA and IRAM RAM's when the Run chip is opened for retest. CODE/XDATA and
IRAM RAM's get cleared with 0, excluding the Factory region at the end of CODE/XDATA. The
IRAM gets also cleared completely outside of the register bank 0 (bottom 8 registers). This
ensures that there is no lingering User code or data values, like keys, in any of the RAM’s.
This bit is in PROT3_CTRL.MEM_C2_PROT and it corresponds to RAM Clear checkbox on
the NVM programmer GUI.
Rev. 1.0
Description
Si4010-C2
81