SI4010-C2-GT Silicon Laboratories Inc, SI4010-C2-GT Datasheet - Page 51

IC TX 27-960MHZ FSK 3.6V 10MSOP

SI4010-C2-GT

Manufacturer Part Number
SI4010-C2-GT
Description
IC TX 27-960MHZ FSK 3.6V 10MSOP
Manufacturer
Silicon Laboratories Inc
Series
EZRadio®r
Type
Crystalless SoC RF Transmitterr
Datasheet

Specifications of SI4010-C2-GT

Package / Case
10-MSOP
Mfg Application Notes
SI4010 Calculator Spreadsheet AppNote
Frequency
27MHz ~ 960MHz
Applications
Garage Openers, RKE, Security Alarms
Modulation Or Protocol
FSK, OOK
Data Rate - Maximum
100 kBaud
Power - Output
10dBm
Current - Transmitting
19.8mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Memory Size
4kB RAM
Features
8051 MCU Core, Crystal-less Operation
Voltage - Supply
1.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Operating Frequency
27 MHz to 960 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Operating Supply Voltage
1.8 V to 3.6 V
Supply Current
14.2 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
336-1997-5

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When the interval counter is finished with the interval count, it clears the FC_BUSY=0 bit and after a few
cycles of clk_sys synchronization delay it sets the FC_DONE=1 bit. Both interval counter and main
FC_COUNT counter are stopped and the main FC_COUNT keeps the accumulated value until the fre-
quency counter is disabled or triggered again. The 23 bit FC_COUNT value can be read as a 4 byte long
word, lFcCount, from the XREG register in XDATA. When the counter is counting and FC_BUSY=1, then
reading the FC_COUNT value returns the on the fly changing value of the FC_COUNT counter.
The frequency counter is restartable. If 1 is written to FC_BUSY while the frequency counter is busy then
the current FC_COUNT result is discarded, main FC_COUNT is reset, and the interval counter is trig-
gered, waiting for the first rising edge of the clk_int clock.
The count interval is chosen with the FC_INTERVAL SFR register. The number of interval count cycles
(count cycles of the low frequency clock) = (2+FC_INTERVAL[0])*(2^FC_INTERVAL[5:1]).
Note: FC_INTERVAL is not allowed to take on numbers higher than 43. If the number is higher than 43, then the
The output of the frequency counter is in the XREG FC_COUNT.
The main function of the Frequency counter is to aid the frequency casting operation, however it can be
used for measuring purposes, using the calibrated LC oscillator as a time base. One example is enhancing
the accuracy of the internal timers of the MCU. See “AN526: Si4010 API Additional Library Description” for
more details.
The user is recommended to use the Frequency Counter Module Function API to set the SFRs associated
to the Frequency Counter.
calculated number or interval count cycles is forced to 1. Even though 43 is the maximum FC_INTERVAL
setting, lower FC_INTERVAL settings can cause the 23-bit frequency counter to overflow depending on the
ratio between the frequency counter clock and the interval clock. Generally, the ratio between these clocks
should be carefully selected to prevent overflow of the frequency counter (unless overflow is explicitly desired).
Rev. 1.0
Si4010-C2
51

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