NH82801HEM S LB9B Intel, NH82801HEM S LB9B Datasheet - Page 16

• Manufacturer Part Number: NH82801HEM S LB9B
• Manufacturer: Intel

Specifications of NH82801HEM S LB9B

• Lead Free Status / RoHS Status: Compliant

10
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PCI-to-PCI Bridge Registers (D30:F0).................................................................... 431
10.1
IDE Controller Registers (D31:F1) (Mobile Only).................................................... 447
11.1
9.10.7 GP_SB_CMDSTS[31:0]—GP Serial Blink Command Status .......................... 427
9.10.8 GP_SB_DATA[31:0]—GP Serial Blink Data................................................ 427
9.10.9 GPI_INV—GPIO Signal Invert Register ..................................................... 428
9.10.10GPIO_USE_SEL2—GPIO Use Select 2 Register[63:32]................................ 428
9.10.11GP_IO_SEL2—GPIO Input/Output Select 2 Register[63:32] ........................ 429
9.10.12GP_LVL2—GPIO Level for Input or Output 2 Register[63:32] ...................... 429
9.10.13GPIO_USE_SEL Override Register (HIGH)—GPIO Use Select
PCI Configuration Registers (D30:F0) ................................................................. 431
10.1.1 VID— Vendor Identification Register (PCI-PCI—D30:F0)............................. 432
10.1.2 DID— Device Identification Register (PCI-PCI—D30:F0) ............................. 432
10.1.3 PCICMD—PCI Command (PCI-PCI—D30:F0) ............................................. 432
10.1.4 PSTS—PCI Status Register (PCI-PCI—D30:F0) .......................................... 433
10.1.5 RID—Revision Identification Register (PCI-PCI—D30:F0) ............................ 435
10.1.6 CC—Class Code Register (PCI-PCI—D30:F0)............................................. 435
10.1.7 PMLT—Primary Master Latency Timer Register
10.1.8 HEADTYP—Header Type Register (PCI-PCI—D30:F0) ................................. 436
10.1.9 BNUM—Bus Number Register (PCI-PCI—D30:F0) ...................................... 436
10.1.10SMLT—Secondary Master Latency Timer Register
10.1.11IOBASE_LIMIT—I/O Base and Limit Register
10.1.12SECSTS—Secondary Status Register
10.1.13MEMBASE_LIMIT—Memory Base and Limit Register
10.1.14PREF_MEM_BASE_LIMIT—Prefetchable Memory Base
10.1.15PMBU32—Prefetchable Memory Base Upper 32 Bits
10.1.16PMLU32—Prefetchable Memory Limit Upper 32 Bits
10.1.17CAPP—Capability List Pointer Register
10.1.18INTR—Interrupt Information Register
10.1.19BCTRL—Bridge Control Register (PCI-PCI—D30:F0) ................................... 441
10.1.20SPDH—Secondary PCI Device Hiding Register
10.1.21DTC—Delayed Transaction Control Register (PCI-PCI—D30:F0) ................... 443
10.1.22BPS—Bridge Proprietary Status Register (PCI-PCI—D30:F0) ....................... 444
10.1.23BPC—Bridge Policy Configuration Register (PCI-PCI—D30:F0) ..................... 445
10.1.24SVCAP—Subsystem Vendor Capability Register
10.1.25SVID—Subsystem Vendor IDs Register (PCI-PCI—D30:F0) ......................... 446
PCI Configuration Registers (IDE—D31:F1) ......................................................... 447
11.1.1 VID—Vendor Identification Register (IDE—D31:F1) ................................... 448
11.1.2 DID—Device Identification Register (IDE—D31:F1).................................... 448
11.1.3 PCICMD—PCI Command Register (IDE—D31:F1) ...................................... 449
11.1.4 PCISTS — PCI Status Register (IDE—D31:F1)........................................... 450
11.1.5 RID—Revision Identification Register (IDE—D31:F1).................................. 451
11.1.6 PI—Programming Interface Register (IDE—D31:F1) .................................. 451
Override Register High .......................................................................... 430
(PCI-PCI—D30:F0)................................................................................ 436
(PCI-PCI—D30:F0)................................................................................ 437
(PCI-PCI—D30:F0)................................................................................ 437
(PCI-PCI—D30:F0)................................................................................ 438
(PCI-PCI—D30:F0)................................................................................ 439
and Limit Register (PCI-PCI—D30:F0) ..................................................... 439
Register (PCI-PCI—D30:F0) ................................................................... 440
Register (PCI-PCI—D30:F0) ................................................................... 440
(PCI-PCI—D30:F0)................................................................................ 440
(PCI-PCI—D30:F0)................................................................................ 440
(PCI-PCI—D30:F0)................................................................................ 442
(PCI-PCI—D30:F0)................................................................................ 446
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